ShogunTraderRestore / DMA-Mouse-resp-Control

Lightweight C++ library for external mouse control via DMA. Simple API, no configuration needed. For game development, automation, and research.

openwall / john

John the Ripper jumbo - advanced offline password cracker, which supports hundreds of hash and cipher types, and runs on many operating systems, CPUs, GPUs, and even some FPGAs

logisim-evolution / logisim-evolution

Digital logic design tool and simulator

Abdess / retrobios

Source-verified BIOS and firmware packs for RetroArch, Batocera, Recalbox, Lakka, RetroPie, EmuDeck, RetroBat, RetroDECK, RomM, BizHawk, ROCKNIX, and MiSTer FPGA. Platform-native verification, with emulator source code as the deciding authority.

open-sdr / openwifi

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

enjoy-digital / litex

Build your hardware, easily!

SpinalHDL / VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation

openhwfoundation / cva6

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

alexforencich / verilog-ethernet

Verilog Ethernet components for FPGA implementation

darklife / darkriscv

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

stnolting / neorv32

🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

GlasgowEmbedded / glasgow

Scots Army Knife for electronics

fastmachinelearning / hls4ml

Machine learning on FPGAs using HLS

SpinalHDL / SpinalHDL

Scala based HDL

analogdevicesinc / hdl

HDL libraries and projects

riscv-mcu / e203_hbirdv2

The Ultra-Low Power RISC-V Core

FPGAwars / icestudio

:snowflake: Visual editor for open FPGA boards

YosysHQ / nextpnr

nextpnr portable FPGA place and route tool

trabucayre / openFPGALoader

Universal utility for programming FPGA

pulp-platform / axi

AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication

aws / aws-fpga

Official repository of the AWS EC2 FPGA Hardware and Software Development Kit

clash-lang / clash-compiler

Haskell to VHDL/Verilog/SystemVerilog compiler

Xilinx / brevitas

Brevitas: neural network quantization in PyTorch

olofk / fusesoc

Package manager and build abstraction tool for FPGA/ASIC development

retronas / retronas

Use a Raspberry Pi, old computer or VM as network storage for different retro computers and consoles

chili-chips-ba / wireguard-fpga

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our door is wide open for backdoor scrutiny, be it related to RTL, embedded, build, bitstream or any other aspect of design and delivery package. Bujrum!

EttusResearch / uhd

The USRP™ Hardware Driver Repository

verilog-to-routing / vtr-verilog-to-routing

Verilog to Routing -- Open Source CAD Flow for FPGA Research

siliconcompiler / siliconcompiler

Modular hardware build system

YosysHQ / icestorm

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

lnis-uofu / OpenFPGA

An Open-source FPGA IP Generator

Woolverine94 / biniou

a self-hosted webui for 30+ generative ai

Xilinx / finn

Dataflow compiler for QNN inference on FPGAs

firesim / firesim

FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility

open-logic / open-logic

Open Logic FPGA Standard Library

FPGAwars / apio

:seedling: Open source ecosystem for open FPGA boards

elipsitz / gamebub

Open-source FPGA retro emulation handheld

emmercm / igir

🕹 A zero-setup ROM collection manager that sorts, filters, extracts or archives, patches, and reports on collections of any size on any OS.

open-sdr / openwifi-hw

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

nickg / nvc

VHDL compiler and simulator

cheyao / icepi-zero

An ECP5 FPGA Dev Board in a Pi Zero form

VUnit / vunit

VUnit is a unit testing framework for VHDL/SystemVerilog

emsec / hal

HAL – The Hardware Analyzer

JulianKemmerer / PipelineC

PypelineC: A hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

TerosTechnology / vscode-terosHDL

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

Digilent / digilent-xdc

A collection of Master XDC files for Digilent FPGA and Zynq boards.

ikwzm / udmabuf

User space mappable dma buffer device driver for Linux.

YosysHQ / apicula

Project Apicula 🐝: bitstream documentation for Gowin FPGAs

Xilinx / XRT

Run Time for AIE and FPGA based platforms

calyxir / calyx

Intermediate Language (IL) for Hardware Accelerator Generators

spcl / dace

DaCe - Data Centric Parallel Programming

SigmanticAI / apex-inference-chip

An inference chip design that runs a real LLM (Qwen2.5-0.5B) on FPGA — one transformer decoder layer in RTL, every silicon value bit-exact against a golden model. 0.56 tok/s measured, a 140× climb, full evidence trail.

vicharak-in / shrike

Low cost microcontroller + FPGA board for makers , hobbyist and student for endless possibility.

fromgof / TridentVision

Implement yolov26m using a complete FPGA, without any C language code. Requires 160K LUTs and 386 DSP cores (based on Xilinx XC7K325T).

a2307588073-arch / zynq-yolov3-tiny-accelerator

INT8 single-class YOLOv3-Tiny accelerator and OV5640-to-HDMI bare-metal demo for Xilinx Zynq-7000 XC7Z100, with PyTorch training and parameter-export tools. Topics yolov3-tiny, fpga, zynq-7000, xc7z100, verilog, vivado, vitis, pytorch, int8-quantization, object-detection, axi4-stream, ov5640, hdmi, embedded-systems, computer-vision

munetomo-maruyama / mmRISC-2

64-bit RISC-V (RV64GC) core that boots Linux on an Arty A7 FPGA. Designed entirely by Claude Code: the specifications, RTL, verification and documents were all written by the AI.

giancarloerra / Degauss

Official repository for Degauss, the blazing-fast, lightweight frontend for MiSTer FPGA. CRT & HDMI, integrated with the standard MiSTer setup, folders and scripts. Browse games already on your card, scrape artwork and metadata directly on MiSTer, use local artwork databases, customise themes and views, and launch without background processes.

YutongChenVictor / NPU-E2E

End-to-End NPU: RTL systolic array → AXI4 SoC → TVM compiler → FPGA inference

kroy-the-rabbit / openfpga-carttools

Cartridge utility for the Analogue Pocket: identifies and dumps Game Boy, Game Boy Color and Game Boy Advance cartridges over the Pocket's own connector

SweiryDev / MicroCNN-TangNano20k

SystemVerilog SoC implementing MicroCNN accelerator on the Tang Nano 20K for BloodMNIST image classification.