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YutongChenVictor / NPU-E2E

git clone https://github.com/YutongChenVictor/NPU-E2E.git

End-to-End NPU: RTL systolic array → AXI4 SoC → TVM compiler → FPGA inference

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Star history (as recorded here)

2026-10-20 · 62 ★ 2026-10-24 · 64 ★
LanguageVerilog
LicenseAGPL-3.0
Created2026-07-29 (2mo ago)
Last push2mo ago
OwnerUser

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