ucb-bar / chipyard
git clone https://github.com/ucb-bar/chipyard.git
1.15.0 · 7d ago
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Open-source Chisel framework for building agile RISC-V systems-on-chip from cores, accelerators, and peripherals.
Why you might care
Chipyard integrates Rocket, BOOM, and other cores with accelerators like Gemmini and Saturn, plus simulation via FireSim and VLSI flows via Hammer. It suits hardware researchers and architects who want a full SoC generator rather than assembling components by hand.
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Star history (as recorded here)
LanguageScala
LicenseBSD-3-Clause
Created2016-10-24 (10y ago)
Last push5d ago
Watchers87
OwnerOrganization
Seen on GitHub Trending
- 2026-10-23 — #25 daily in scala · +1 ★
- 2026-10-22 — #17 daily in scala · +3 ★
- 2026-10-21 — #10 daily in scala · +1 ★
- 2026-10-20 — #10 daily in scala
GitHub topics
acceleratorsboomchip-generatorchipyardchiselfiresimhwachaout-of-orderperipheralsrisc-vriscvrocketrocket-chiprtlsocsuperscalar
Links
- GitHub: github.com/ucb-bar/chipyard
- Homepage: https://chipyard.readthedocs.io/en/latest/
- Releases · Issues · Hacker News mentions
README excerpt
# Chipyard framework ## Quick Links * **Latest Documentation**: https://chipyard.readthedocs.io/ * **User Question Forum**: https://groups.google.com/forum/#!forum/chipyard * **Bugs and Feature Requests**: https://github.com/ucb-bar/chipyard/issues ## Using Chipyard To get started using Chipyard, see the documentation on the Chipyard documentation site: https://chipyard.readthedocs.io/ ## What is Chipyard Chipyard is an open source framework for agile development of Chisel-based systems-on-chip. It will allow you to leverage the Chisel HDL, Rocket Chip SoC generator, and other [Berkeley][berkeley] projects to produce a [RISC-V][riscv] SoC with everything from MMIO-mapped peripherals to custom accelerators. Chipyard contains processor cores ([Rocket][rocket-chip], [BOOM][boom], [CVA6 (Ariane)][cva6]), vector units ([Saturn][saturn], [Ara][ara]), accelerators ([Gemmini][gemmini], [NVDLA][nvdla]), memory systems, and additional peripherals and tooling to help create a full featured SoC. Chipyard supports multiple concurrent flows of agile hardware development, including software RTL simulation, FPGA-accelerated simulation ([FireSim][firesim]), automated VLSI flows ([Hammer][hammer]), and software workload generation for bare-metal and Linux-based systems ([FireMarshal][firemarshal]). Chipyard is actively developed in the [Berkeley Architecture Research Group][ucb-bar] in the [Electrical Engineering and Computer Sciences Department][eecs] at the [University of California, Berkeley][berkeley]. ## Resources * Chipyard Documentation: https://chipyard.readthedocs.io/ * Chipyard (x FireSim) Tutorial: https://fires.im/tutorial-recent/ * Chipyard Basics slides: https://fires.im/asplos23-slides-pdf/02_chipyard_basics.pdf ## Need help? * Join the Chipyard Mailing List: https://groups.google.com/forum/#!forum/chipyard * If you find a bug or would like propose a feature, post an issue on this repo: https://github.com/ucb-bar/chipyard/issues ## Contributing * See CONTRIBUTING.md ## Attribution and Chipyard-related Publications If used for research, please cite Chipyard by the following publication: [code] * **Chipyard** * A. Amid, et al. *IEEE Micro'20* PDF. * A. Amid, et al. *DAC'20* PDF. * A. Amid, et al. *ISCAS'21* PDF. These additional publications cover many of the internal components used in Chipyard. However, for the most up-to-date details, users should refer to the Chipyard docs. * **Generators** * **Rocket Chip**: K. Asanovic, et al., *UCB EECS TR*. PDF. * **BOOM**: C. Celio, et al., *Hot Chips 30*. PDF. * **SonicBOOM (BOOMv3)**: J. Zhao, et al., *CARRV'20*. PDF. * **COBRA (BOOM Branch Prediction)**: J. Zhao, et al., *ISPASS'21*. PDF. * **Gemmini**: H. Genc, et al., *DAC'21*. PDF. * **Sims** * **FireSim**: S. Karandikar, et al., *ISCA'18*. PDF. * **FireSim Micro Top Picks**: S. Karandikar, et al., *IEEE Micro, Top Picks 2018*. PDF. * **FASED**: D. Biancolin, et al., *FPGA'19*. PDF. * **Golden Gate**: A. Magyar, et al., *ICCAD'19*. PDF. *
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