OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor

jpillora / chisel

A fast TCP/UDP tunnel over HTTP

chipsalliance / chisel

Chisel: A Modern Hardware Design Language

ucb-bar / chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

riscv-boom / riscv-boom

SonicBOOM: The Berkeley Out-of-Order Machine

freechipsproject / chisel-bootcamp

Generator Bootcamp Material: Learn Chisel the Right Way

THU-DSP-LAB / ventus-gpgpu

GPGPU processor supporting RISCV-V extension, developed with Chisel HDL

schoeberl / chisel-book

Digital Design with Chisel

ElgenTidwell / Chisel

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YeXiHuTeam / YeXiHuCore

USTC YeXiHu Team NSCSCC 2026 LA32R out-of-order processor core in Chisel. 中国科学技术大学也西湖队龙芯杯参赛项目。