nand2mario / z486_MiSTer
git clone https://github.com/nand2mario/z486_MiSTer.git
20261012 · 12d ago
🔥 on GitHub Trending today
An experimental 80486-class x86 CPU core and PC system for the MiSTer FPGA platform, written in SystemVerilog.
Why you might care
Offers a pipelined 486-class CPU with SDRAM-backed memory (16-128 MB) and VGA/ET4000 SVGA modes on MiSTer hardware, running roughly 486DX2-66 performance. Still experimental with incomplete x87 support; it runs Doom at 29.1 FPS versus 21.0 FPS for ao486 in the author's comparison. Requires an SDRAM module.
+0
stars, 24h · #23,291
+4
stars, 7 days · #20,929
+~0
stars, 30 days · #39,225
120
★ total · +3% this week
10
forks · 22 open issues
Star history (as recorded here)
LanguageVerilog
License—
Created2026-04-26 (6mo ago)
Last push12d ago
Watchers8
OwnerUser
Seen on GitHub Trending
- 2026-10-24 — #4 weekly in verilog · +4 ★
- 2026-10-23 — #3 weekly in verilog · +4 ★
- 2026-10-22 — #3 weekly in verilog · +4 ★
- 2026-10-21 — #3 weekly in verilog · +4 ★
- 2026-10-20 — #3 weekly in verilog · +5 ★
Links
README
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Blurb generated by claude-haiku-5-5 today. Star deltas marked ~ are extrapolated from partial history.