espressif / esp-dl

# ESP-DL [[中文]](./README_cn.md)
ESP-DL is a lightweight and efficient neural network inference framework designed specifically for ESP series chips. With ESP-DL, you can easily and quickly develop AI applications using Espressif's System on Chips (SoCs).
## Overview
ESP-DL offers APIs to load, debug, and run AI models. The framework is easy to use and can be seamlessly integrated with other Espressif SDKs. ESP-PPQ serves as the quantization tool for ESP-DL, capable of quantizing models from ONNX, Pytorch, and TensorFlow, and exporting them into the ESP-DL standard model format.
- **ESP-DL Standard Model Format**: This format is similar to ONNX but uses FlatBuffers instead of Protobuf, making it more lightweight and supporting zero-copy deserialization, with a file extension of `.espdl`.
- **Flexible Mixed Quantization**: ESP-DL supports 8-bit (w8a8), 16-bit (w16a16), and mixed-precision (w8a16) quantization. These schemes can be freely combined within a model to preserve accuracy while maximizing inference efficiency.
- **Efficient Operator Implementation**: ESP-DL efficiently implements common AI operators such as Conv, Gemm, Add, and Mul. **The list of supported operators**. For performance benchmark data of some operators on ESP32-S3 and ESP32-P4, please refer to benchmark_report.md.
- **Static Memory Planner**: The memory planner automatically allocates different layers to the optimal memory location based on the user-specified internal RAM size, ensuring efficient overall running speed while minimizing memory usage.
- **Dual Core Scheduling**: Automatic dual-core scheduling allows computationally intensive operators to fully utilize the dual-core computing power. Currently, Conv2D and DepthwiseConv2D support dual-core scheduling.
- **8bit LUT Activation**: All activation functions except for ReLU and PReLU are implemented using an 8-bit LUT (Look Up Table) method in ESP-DL to accelerate inference. You can use any activation function, and their computational complexity remains the same.
## News
- [2026/10/15] Optimized a wide range of operators, including Conv, Gemm, MatMul, Resize, Reduce, LUT, Transpose, and Pooling. Models such as MobileNetV2 and YOLO11 achieve more than 3× speedup on ESP32-S3 and more than 1.9× speedup on ESP32-P4. Thanks to Hosi121, BoumedineBillal, and other contributors.
- [2026/9/1] Starting from ESP-DL v3.3.11, w8a16 mixed quantization is fully supported.
- [2026/7/30] Added PP-OCRv6 OCR model and example, recognizing Chinese, English and 46 Latin-script languages on-device on ESP32-P4.
- [2026/6/5] Introduce two skills, esp32s3-pie-simd and esp32p4-pie-simd, to help the code agent rewrite the code into a PIE-accelerated version.
- [2026/5/13] Introduced **espdl-quantize skill**, which automatically iterates to search for optimal esp-ppq quantization strategies, reducing manual tuning costs and improving quantized model accuracy. See how_to_use_espdl_quantize_skill.rst.
- [2026/4/23] Support model quantization via Au