The-OpenROAD-Project / OpenROAD
git clone https://github.com/The-OpenROAD-Project/OpenROAD.git
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Open-source unified application implementing an RTL-to-GDS physical design flow for digital chips, with Tcl and Python APIs.
Why you might care
Useful for IC designers, researchers, and students who need an open flow from RTL to GDSII without commercial EDA licenses. It provides placement, routing, timing analysis, and related steps in one application, and is the core of OpenROAD-flow-scripts used in many tapeouts.
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stars, 24h · #5,341
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stars, 30 days · #6,861
3.2k
★ total · +1% this week
1.1k
forks · 238 open issues
Star history (as recorded here)
LanguageVerilog
LicenseBSD-3-Clause
Created2019-10-28 (6y ago)
Last pushtoday
Watchers50
OwnerOrganization
Seen on GitHub Trending
- 2026-10-24 — #1 daily in verilog · +4 ★
- 2026-10-24 — #1 monthly in verilog · +106 ★
- 2026-10-24 — #1 weekly in verilog · +38 ★
- 2026-10-23 — #1 daily in verilog · +6 ★
- 2026-10-23 — #1 monthly in verilog · +104 ★
- 2026-10-23 — #1 weekly in verilog · +39 ★
- 2026-10-22 — #1 daily in verilog · +10 ★
- 2026-10-22 — #1 monthly in verilog · +99 ★
- 2026-10-22 — #1 weekly in verilog · +41 ★
- 2026-10-21 — #2 daily in verilog · +5 ★
- 2026-10-21 — #1 monthly in verilog · +94 ★
- 2026-10-21 — #1 weekly in verilog · +36 ★
- 2026-10-20 — #2 daily in verilog · +4 ★
- 2026-10-20 — #1 monthly in verilog · +92 ★
- 2026-10-20 — #1 weekly in verilog · +34 ★
GitHub topics
Links
- GitHub: github.com/The-OpenROAD-Project/OpenROAD
- Homepage: https://theopenroadproject.org/
- Releases · Issues · Hacker News mentions
README
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Blurb generated by claude-haiku-5-5 1d ago. Star deltas marked ~ are extrapolated from partial history.