OpenXiangShan / XiangShan
git clone https://github.com/OpenXiangShan/XiangShan.git
🔥 on GitHub Trending today
Open-source high-performance RISC-V processor core written in Chisel, developed by the XiangShan project.
Why you might care
Targets researchers and chip teams who want a real, out-of-order high-performance RISC-V CPU design to study, simulate, or build on. Documents a MICRO 2022 paper on agile hardware development tooling used in its verification and performance validation. Several microarchitecture generations are maintained on separate branches, with Kunminghu-V3 under active development and not yet stable.
+5
stars, 24h · #5,337
+26
stars, 7 days · #7,075
+76
stars, 30 days · #8,985
7.3k
★ total · +0% this week
965
forks · 333 open issues
Star history (as recorded here)
LanguageScala
LicenseMulanPSL-2.0
Created2020-06-13 (6y ago)
Last pushtoday
Watchers94
OwnerOrganization
Seen on GitHub Trending
- 2026-10-24 — #3 daily in scala · +8 ★
- 2026-10-24 — #16 monthly in scala · +76 ★
- 2026-10-24 — #3 weekly in scala · +26 ★
- 2026-10-23 — #8 daily in scala · +3 ★
- 2026-10-23 — #20 monthly in scala · +70 ★
- 2026-10-23 — #5 weekly in scala · +21 ★
- 2026-10-22 — #5 daily in scala · +2 ★
- 2026-10-22 — #13 monthly in scala · +68 ★
- 2026-10-22 — #3 weekly in scala · +22 ★
- 2026-10-21 — #2 daily in scala · +4 ★
- 2026-10-21 — #13 monthly in scala · +69 ★
- 2026-10-21 — #5 weekly in scala · +26 ★
- 2026-10-20 — #2 daily in scala · +5 ★
- 2026-10-20 — #13 monthly in scala · +67 ★
- 2026-10-20 — #5 weekly in scala · +22 ★
GitHub topics
Links
- GitHub: github.com/OpenXiangShan/XiangShan
- Homepage: https://xiangshan.cc
- Releases · Issues · Hacker News mentions
README
Loading README…
Blurb generated by claude-haiku-5-5 1d ago. Star deltas marked ~ are extrapolated from partial history.