CVA6 is a 6-stage, single-issue, in-order 64-bit RISC-V CPU core written in SystemVerilog, supporting Linux-capable configurations.
VUnit is a unit testing framework for VHDL/SystemVerilog
CVA6 is a 6-stage, single-issue, in-order 64-bit RISC-V CPU core written in SystemVerilog, supporting Linux-capable configurations.
VUnit is a unit testing framework for VHDL/SystemVerilog