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openhwfoundation / cva6

The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.

▲ ~7/7d ★ 3.2k Assembly 🔥 today
pulp-platform / ara

The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core

▲ ~0/7d ★ 554 C 6d ago
munetomo-maruyama / mmRISC-2

64-bit RISC-V (RV64GC) core that boots Linux on an Arty A7 FPGA. Designed entirely by Claude Code: the specifications, RTL, verification and documents were all written by the AI.

▲ ~0/7d ★ 88 SystemVerilog 2d ago
bubblebabyboi / sigil

Sigil: an in-house RV64GCV RISC-V core and SoC with hardware hashing (SHA-2/SHA-3/Keccak) and signature verification (Ed25519, secp256k1)