lowRISC / ibex
Ibex is a small 32-bit RISC-V CPU core with high-level of verification (previously known as zero-riscy)
lowRISC / ibex
capstone-engine / capstone
Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, LoongArch, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.
stnolting / neorv32
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
sysprog21 / shecc
A self-hosting and educational C optimizing compiler
openhwfoundation / cv32e40p
CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
sysprog21 / rv32emu
Compact and Efficient RISC-V RV32I[MAFC] emulator
cwu766485-ctrl / LumenRV32
A lightweight RV32I RISC-V processor core implemented in Verilog for architecture and RTL design practice.
adityarajIITj / adios
An ultra-lightweight, zero-bloat bare-metal operating system built from scratch for a custom RISC-V (RV32I) simulation layer. Featuring preemptive multitasking, page frame allocation, a custom toolchain, and an interactive shell.