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openhwfoundation / cvw

CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.

▲ ~5/7d ★ 649 SystemVerilog 🔥 1d ago
Dollbar / Overflow

This is an open-source project focused on AI system-on-chip (SoC) architecture, jointly initiated by the Dollbar organization at the USTc.