platformio / platformio-core

Your Gateway to Embedded Software Development Excellence :alien:

chipsalliance / riscv-dv

Random instruction generator for RISC-V processor verification

riscv / riscv-opcodes

RISC-V Opcodes

riscv-non-isa / riscv-elf-psabi-doc

A RISC-V ELF psABI Document

danielhrisca / asammdf

Fast Python reader and editor for ASAM MDF / MF4 (Measurement Data Format) files

litex-hub / linux-on-litex-vexriscv

Linux on LiteX-VexRiscv

b3s3da / qemu-harness

QEMU harness for AI agents: boot aarch64/arm/riscv64/x86_64 kernels in seconds, exec via guest agent, fast rootfs rebuilds, IoT emulation

adityarajIITj / adios

An ultra-lightweight, zero-bloat bare-metal operating system built from scratch for a custom RISC-V (RV32I) simulation layer. Featuring preemptive multitasking, page frame allocation, a custom toolchain, and an interactive shell.