RSI-Labs / RSI-Chip

# Rust EDA Toolchain
This workspace is an API-first, Rust-native EDA toolchain intended for agent
driven digital, analog, and physical-design flows. It is deliberately modular:
each domain is independently consumable and the `eda-api` facade provides the
one-call surface preferred by automation.
## Run and test
 [code] 
The data-driven regression target currently contains **15,101 unique named
cases**. It is not a collection of three or four broad assertions: every case
has a distinct name and independently reports success or failure. Of those,
`eda_tests::ams_cases` contributes exactly 3,110 analog/mixed-signal
circuit cases spanning:
The HDL frontend now executes a SystemVerilog class subset that underpins
agent-driven verification: `class`/`virtual class` declarations with
`extends` inheritance, `this`/`super` member and method dispatch (including
`super.new`), constructors via `h = new(args)` with trailing default
arguments, explicit `null` handle assignment/comparison with alias-group
detachment, object-identity `==`/`!=` across aliased handles, and declaration
initializers, `$cast` between handles on statically known inheritance chains,
shallow-copy construction via `dst = new source`, void `function`/`task`
methods, value-returning methods in
statement and expression positions (direct assignment calls also execute
method side effects and virtual dispatch), shared `static` properties and
`static function` methods addressed through the class name, handle copy semantics, property
qualifiers (`rand`, `randc`, `local`, `protected`, `const`), classes with
parameter lists (`class C #(parameter W = 8)` with explicit
`C #(.W(4))` / `C #(4)` integer specializations and default-value
substitution across widths, defaults, and method bodies, plus parameterized
base selection and forwarded actuals in `extends`), package-scope
classes with `pkg::Type` visibility, and a built-in UVM-lite `uvm_object`
base class (`new`/`get_id`) that derived transaction classes can extend
without any external library. A `string` subset (512-bit NUL-padded
byte packing, up to 64 characters) supports declaration, assignment,
literal comparison, `len()`/`getc()`/`putc()`/`substr()`/`atoi()`/
`atohex()`/`atobin()`/`itoa()`/`hextoa()`/`bintoa()`/`compare()`/
`icompare()`/`toupper()`/`tolower()` methods, class properties, and constructor arguments, plus
`$sformatf` with fully constant
arguments (compile-time `%0d/%h/%b/%s/%%` formatting into the packed
string subset) a `uvm_objection`
counter (`raise`/`drop` with call counts and a `drained`/`check_drained`
termination check), a depth-four
`uvm_tlm_fifo` mailbox (`try_put`/`try_get`/`peek` with FIFO ordering,
full rejection, and empty reads; sharable by sequencer and driver
handles), a sequential UVM-lite `uvm_event`
(`trigger`/`wait_trigger`/`reset`/`is_on` with trigger and consumption
counts), a `uvm_barrier` threshold counter, a bounded depth-four
`uvm_queue` int deque (`push_front`/`push_back`/`pop_front`/`pop_back`/
`size`/`